Chapter 7

Registers

Registers is a group of storage cells suitable for holding binary information.

A group of flip-flops constitute a register since each flip-flop is a binary cell capable of storing 1 bit of information.

An n bit register has group of n-flip-flop and is capable of storing any binary information containing n-bits.

A register may also contain combinational gates that perform data processing task.

The flip-flop in register holds binary information and the gates control when and how new information is transferred into the registers.

Fig:

Shift register

A register capable of shifting each binary information either to the left or to the right is called the shift register.

The logic configuration of the shift register consist of a chain of flip-flop connected in a cascade with the output of 1 flip-flop connected to the input of next flip-flop.

All flip-flop receive a common clock-pulse which causes the shift from 1 storage to next.

Fig:

Each cp shifts the contain of the register 1-bit position to the right.

The serial input determine what goes into the left most flip-flop during the shift.

The serial is output is taken from the output of the right-most flip-flop prior to the application of a pulse.

Basic data movement in shift register

1. Serial In/serial out(shift right)

2. Parallel In/Serial out

3. Serial In/Parallel out

4. Parallel In/Parallel out

D

D

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D

Serial Transfer:

Fig:

A digital system is said to be in serial mode of information is transferred and manipulated 1-bit at a time. The contain of 1-register to another by shifting a single bit in a instants.

The serial Transfer of information from register A to B is shown in above figure(Block Diagram). The serial output(S0) of a register A goes to the serial input of register B. to prevent the lost of information stored in the source register reg. A is make to circulate each information by connecting the S/O to its S/I terminal. Initial content of reg.B is shift out through its serial output and is lost unless it is transferred to a 3^rd shift register. The shift connected register determines

when a bit how many times the registers are shifted. This is done by the AND gate that allows the clock-pulse to pass into the cp terminals only when shift control is 1.

Table:

After the 4^th shift, the shift control goes to zero and both reg.A and B have value 1001. Thus the contain of reg A is transferred to B with the contain of reg A unchanged.